(preliminary) pl671-05/-06 picoemi t m programmable spread spectrum clock 47745 fremont blvd., fremont, california 94538 tel (510) 492-0990 fax (510) 492-0991 www.phaselink.com rev 2/9/07 page 1 features ? advanced programmable pll with spread spectrum ? accepts reference clock input: 10-200mhz ? output frequency range: up to 166mhz @ 2.5v or up to 200mhz @ 3.3v operation. ? programmable spread spectrum modulation magnitude: o center spread: 0.125% to 2.0% in 0.125% steps o down spread: -0.25% to -4.0% in 0.25% steps ? four pre-programmed configurations. ? spread spectrum on/off selection. ? programmable output drive (4ma, 8ma, 16ma) ? low cycle to cycle jitter. ? single 2.5v or 3.3v 10% power supply. ? accepts 0.1v reference signal input voltage. ? available in 6-pin sot23 green /rohs compliant packages. description the pl671-05 and -06 are advanced programmable cloc k and spread spectrum clock generators (psscg), and members of phaselinks picopll? programmable clock family. the pl671-05 and -06 offer up to 200mhz outputs, an d allow for programming the modulation type (center o r down spread), as well as 16 modulation magnitudes (0.12 5 to 2.0% or -0.25 to -4.0%) to choose from. in additi on, the csel[0:1] pins can be used to toggle the device thru 4 pre-programmed configurations. the spread spectrum modulation can be turned on/off, allowin g for completing a design with pl671-05/-06 and having th e assurance of turning on the emi modulation, if em i becomes an issue. the frequency modulation of th e pl671-05 and -06 greatly reduces the fundamental and harmonic frequencies peak magnitude, therefore reducing the system level electro magneti c interference (emi), by as much as 20db. pin configuration note: ^ denotes 60k pull-up resistor block diagram p-counter 6-bits odd/even m-counter 11-bits r-counter 9-bits programmable function programming logic sst modulation * optional pre-defined modulation magnitude control selectable 1 or 2 f vco = f ref * (m/r) phase detector charge pump loop filter vco 8 8 f out = f vco / p sst on/off modulation magnitude* csel[0:1] clk0
(preliminary) pl671-05/-06 picoemi t m programmable spread spectrum clock 47745 fremont blvd., fremont, california 94538 tel (510) 492-0990 fax (510) 492-0991 www.phaselink.com rev 2/9/07 page 2 package pin assignment name pl671-05 sot23-6l PL671-06 sot23-6l type description clk0 1 3 o programmable clock output with spread spectrum (sst can be turned off). gnd 2 2 p gnd connection. fin 3 1 i reference input pin. vdd 4 4 p vdd connection (2.25~3.63v) csel0^, csel1^ 5,6 5,6 i optional, pre-programmed configuration input contro l pins, to allow switching between 4 pre-defined configurati ons. both pins incorporate a 60kk pull up resistor. key programming parameters clock output frequency sst modulation magnitude (spread percentage) on the fly configuration output drive strength f out = f ref * m / (r * p) where m =11 bit r = 9 bit p = 6 bit clk0= f ref , f ref /2, f out * ?p? is a 6-bit odd/even divider 16 programmable modulation magnitudes to choose from: ? center spread: 0.125% to 2.0% in 0.125% steps ? down spread: -0.25% to -4.0% in 0.25% steps up to 4 ?on-the-fly? switchabe pre-defined configurations.. ? csel[0:1] configuration selection - input three optional drive strengths to choose from: ? low: 4ma ? std: 8ma (default) ? high: 16ma functional description pl671-05/-06 are highly featured, very flexible, ad vanced programmable pll designs for high performanc e, low- power spread spectrum modulation applications. the pl671-05/-06 accept a reference clock input of 10m hz to 200mhz and are capable of producing sst modulated o utputs up to 200mhz. these flexible designs allow the pl671-05/-06 to deliver any pll generated frequency , f ref (ref clk) frequency or f ref /2 to clk0. the use of csel0 & csel1 allows the device to choose from up t o 4 different modulation magnitude settings providi ng a range of spread settings to choose from. some of t he design features of the pl671-05 are mentioned be low. pll programming the pll in the pl671-05/-06 is fully programmable. the pll is equipped with an 8-bit input frequency divider (r-counter), and an 11-bit vco frequency feedback loop divider (m-counter). the output of t he pll is transferred to a 6-bit post vco odd/even divider (p-counter). the output frequency is determined by the following formula [f out = (f ref * m)/(r*p). modulation magnitude and type the pl671-05/-06 provide the following programmable capabilities for modulation type and modulation magnitude (spread percentage): modulation type modulation magnitude programming steps center spread 0.125% thru 2.00% 0.125% down spread -0.25% thru -4.00% -0.25%
(preliminary) pl671-05/-06 picoemi t m programmable spread spectrum clock 47745 fremont blvd., fremont, california 94538 tel (510) 492-0990 fax (510) 492-0991 www.phaselink.com rev 2/9/07 page 3 modulation rate the pl671-05/-06 modulation rate is defined as f ref (ref clk frequency) divided by 8 times the r-counte r, i.e. modulation rate = (f ref / 8r). the rate can be changed by choosing alternate r-counter settings. clock output (clk0) the output of clk0 can be configured as the pll output (f vco /p), f ref (ref clk frequency) output, or f ref /2 output. the output drive level can be programmed to low drive (4ma), standard drive (8ma) or high drive (16ma). the output frequency can be programmed up to 200mhz at 3.3v (166mhz at 2.5v). csel[0:1] configuration selectors the pl671-05/-06 has the capability to be programmed with 4 distinct configurations and to toggle on the fly between these configurations using the selector pads csel0 and csel1. an example would be a part that can run at 0.25%, 0.50%, 1.0% or 1.5% based on the csel0 and csel1 configuration. csel0 and csel1 both incorporate a 60kk pull up resistor giving a defaul t condition of logic 1. layout recommendations the following guidelines are to assist you with a p erformance optimized pcb design: signal integrity and termination considerations - keep traces short! - trace = inductor. with a capacitive load this equals ringing! - long trace = transmission line. without proper termination this will cause reflections ( looks like ringing ). - design long traces as ?striplines? or ?microstrips? with defined impedance. - match trace at one side to avoid reflections bouncing back and forth. decoupling and power supply considerations - place decoupling capacitors as close as possible to the vdd pin(s) to limit noise from the power supply - multiple vdd pins should be decoupled separately for best performance. - addition of a ferrite bead in series with vdd can help prevent noise from other board sources - value of decoupling capacitor is frequency dependant. typical values to use are 0.1 f for designs using crystals < 50mhz and 0.01 f for designs using crystals > 50mhz.
(preliminary) pl671-05/-06 picoemi t m programmable spread spectrum clock 47745 fremont blvd., fremont, california 94538 tel (510) 492-0990 fax (510) 492-0991 www.phaselink.com rev 2/9/07 page 4 electrical specifications absolute maximum ratings parameters symbol min. max. units supply voltage range v dd -0.5 4.6 v input voltage range v i -0.5 v dd +0.5 v output voltage range v o -0.5 v dd +0.5 v soldering temperature (green package) 260 c data retention @ 85 c 10 year storage temperature t s -65 150 c ambient operating temperature* -40 85 c exposure of the device under conditions beyond the limits specified by maximum ratings for extended pe riods may cause permanent damage to the device and affect product reliability. these conditions r epresent a stress rating only, and functional opera tions of the device at these or any other condition s above the operational limits noted in this specification is not implied. *operating temperature is guarante ed by design. parts are tested to commercial grade only. ac specifications parameters conditions min. typ. max. units @ v dd =3.3v 200 input (fin) frequency @ v dd =2.5v 10 166 mhz input (fin) signal amplitude internally ac coupled (high frequency) 0.9 v dd v pp input (fin) signal amplitude internally ac coupled (low frequency) 3.3v < 50mhz, 2.5v < 40mhz 0.1 v dd v pp @ v dd =3.3v 200 mhz output frequency @ v dd =2.5v 166 mhz settling time at power-up (after v dd increases over 2.25v) 2 ms output enable time pdb function; ta=25o c, 15pf loa d 2 ms 15pf load, 10/90% v dd , standard drive 2.5 3.5 ns output rise time 15pf load, 10/90% v dd , high drive 1.2 1.7 ns 15pf load, 90/10% v dd , standard drive 1.7 2.0 ns output fall time 15pf load, 90/10% v dd , high drive 1.2 1.7 ns duty cycle at v dd / 2 45 50 55 % cycle to cycle jitter t cyc-cyc (over output frequency range @ 3.3v) 100 ps * note: jitter performance depends on the programmi ng parameters.
(preliminary) pl671-05/-06 picoemi t m programmable spread spectrum clock 47745 fremont blvd., fremont, california 94538 tel (510) 492-0990 fax (510) 492-0991 www.phaselink.com rev 2/9/07 page 5 dc specifications parameters symbol conditions min. typ. max. units at 25mhz, 3.3v, load=15pf, (pdb=1) 15 ma supply current, dynamic, with loaded outputs i dd pdb=0 10 a operating voltage v dd 2.25 3.63 v output low voltage v ol i ol = +4ma (std. drive) 0.4 v output high voltage v oh i oh = -4ma (std. drive) v dd C 0.4 v output current, low drive i osd v ol = 0.4v, v oh = 2.4v 4 ma output current, standard drive i osd v ol = 0.4v, v oh = 2.4v 8 ma output current, high drive i ohd v ol = 0.4v, v oh = 2.4v 16 ma package drawings ( green package compliant) sot23-6 l dimension in mm symbol min. max. a 1.05 1.35 a1 0.05 0.15 a2 1.00 1.20 b 0.30 0.50 c 0.08 0.20 d 2.80 3.00 e 1.50 1.70 h 2.60 3.00 l 0.35 0.55 e 0.95 bsc c l a2 e h d a1 e b a pin1 dot
(preliminary) pl671-05/-06 picoemi t m programmable spread spectrum clock 47745 fremont blvd., fremont, california 94538 tel (510) 492-0990 fax (510) 492-0991 www.phaselink.com rev 2/9/07 page 6 ordering information ( green package compliant) phaselink corporation, reserves the right to make c hanges in its products or specifications, or both a t any time without notice. the information furnished by phaselink is believed to be accurate a nd reliable. however, phaselink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any lo ss or damage of whatever nature resulting from the use of, or reliance upon this product. life support policy : phaselinks products are not authorized for use a s critical components in life support devices or sy stems without the express written approval of the president of phasel ink corporation. solder reflow profile available at www.phaselink.com/qa/solderinggreen.pdf for part ordering, please contact our sales department: 47745 fremont blvd., fremont, ca 94538, usa tel: (510) 492-0990 fax: (510) 492-0991 part number the order number for this device is a combination o f the following: part number, package type and operating temperature range pl671 -0x-xxx t c -r * phaselink will a ssign a unique 3-digit id code for each approved pr ogrammed part number. part number /order number marking ? package option pl671-05-xxxtc-r f4xxx 6-pin sot23 (tape and reel) PL671-06-xxxtc-r f5xxx 6-pin sot23 (tape and reel) ? note: xxx designates marking identifier that, at times, could be independent of the part number. pl ease consult your phaselink sales rep resentative for marking information. part number temperature c=commercial i = industrial package type t=sot23-6l 3 digit id code * n one= tube r=tape and reel
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